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LTC3217
PACKAGE DESCRIPTION
At moderate to high output power, the quiescent current
of the LTC3217 is negligible and the expression shown in
of 2 times the actual input voltage. In an ideal 2x charge
pump, the power ef?ciency would be given by:
= =
Equation 6 is valid.
Once dropout is detected at the LED pin, the LTC3217
enables the charge pump in 1.5x mode.
η IDEAL =
P LED
P IN
( V LED ? I LED ) V LED
( V BAT ? ( 2 ) ? I LED ) ( 2 ? V BAT )
(8)
In 1.5x boost mode, the ef?ciency is similar to that of a
linear regulator with an effective input voltage of 1.5 times
the actual input voltage. This is because the input current
for a 1.5x charge pump is approximately 1.5 times the
load current. In an ideal 1.5x charge pump, the power
ef?ciency would be given by:
Thermal Management
For higher input voltages and maximum output current,
there can be substantial power dissipation in the LTC3217.
If the junction temperature increases above approximately
150°C the thermal shutdown circuitry will automatically
deactivate the output current sources and charge pump.
= =
η IDEAL =
P LED
P IN
( V LED ? I LED ) V LED
( V BAT ? ( 1 . 5 ) ? I LED ) ( 1 . 5 ? V BAT )
(7)
To reduce maximum junction temperature, a good thermal
connection to the PC board is recommended. Connecting
the Exposed Pad to a ground plane and maintaining a solid
Similarly, in 2x boost mode, the ef?ciency is similar to
that of a linear regulator with an effective input voltage
ground plane under the device will reduce the thermal
resistance of the package and PC board considerably.
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
BOTTOM VIEW—EXPOSED PAD
3.50 ± 0.05 1.45 ± 0.05
2.10 ± 0.05 (4 SIDES)
0.70 ± 0.05
3.00 ± 0.10
(4 SIDES)
PIN 1
TOP MARK
(NOTE 6)
0.75 ± 0.05
1.45 ± 0.10
(4-SIDES)
R = 0.115
TYP
15
16
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45 ° CHAMFER
0.40 ± 0.10
1
2
PACKAGE
OUTLINE
(UD16) QFN 0904
0.25 ± 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
0.200 REF
0.00 – 0.05
0.25 ± 0.05
0.50 BSC
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
3217fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
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